Fast startup of LC VCOs using circuit asymmetries

The effect of deliberate circuit mismatches in an LC VCO is investigated and it is shown that such mismatches can significantly reduce the oscillation start-up time. An analysis is presented that shows that the presence of mismatches results in a common-mode disturbance simultaneous with the turn-on of the tail current. The use of this technique is applied to a low-power transmitter for an ultra-wideband wireless communication system using the on-off keying modulation scheme. Simulations using a 0.18-μm CMOS technology with a 4 GHz carrier frequency give 34.5 pJ/bit assuming a repetition rate of 1 Mb/s.