A cascade non-decimation charge-domain filter with noise-folding reduction

A cascade non-decimation charge-domain filter (CNCDF) with noise-folding reduction for high attenuation and bandwidth was proposed. The CNCDF, based on non-decimation property, could suppress the noise-folding source from a down-sampling rate and duplicate-sampled signals upon a sensible input-clock rate (ICR). By using 600-MS/s ICR, the measurement showed 91-dB attenuation of the first folding signal, 95-dB stop-band attenuation, and 10-MHz bandwidth. The chip also possessed 30-dB gain and 6-dBm ΠΡ3, consuming 11.86-mA current from a 1.2-V power supply. The chip, including ESD and clock-logical circuits, occupies 3.6 mm
²
in 90-nm CMOS process.