An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines

In this paper, we present a transmission-line-based model developed to accurately describe the power and ground-line interconnections of modern digital ASICs. The proposed model employs transmission lines as the core component to properly describe both the capacitive and inductive behavior of the metal lines. In addition, the nonlinear frequency dependence of the line resistance, due to the skin-effect, is modeled with an additional lumped model. The model is completely derived from measurement data and allows describing both in-house and third-party ASICs. High-frequency
$S$
-parameter measured data are used to benchmark the model. Finally, on-board voltage measurements of a Numonyx 64 Mbit flash memory are performed and compared with transistor-level simulations.