A method for bounding the effect of DMA I/O interference on program execution time

A DMA controller that operates in the cycle-stealing mode transfers data by "stealing" bus cycles from an executing program. This cycle stealing operation retards the progress of the executing program and extends its execution time. We first present a method that bounds the worst-case execution time of a program executing concurrently with a cycle-stealing DMA I/O operation in the simple case where the execution time of each machine instruction is fixed. We next extend this method to deal with the case of instruction-cache architectures. We demonstrate the effectiveness of our methods by the results of simulations of several programs.