Integrate and dump based VGA with an embedded programmable analog FIR filter

This paper presents a novel VGA (Variable Gain Amplifier) with an embedded analog FIR (Finite Impulse Response) filter architecture. The idea is based on a modified version of the integrate and dump circuit. The proposed modifications allow altering the frequency response of the circuit without significantly increasing the circuit complexity along with maintaining acceptable gain control range, noise and linearity. The proposed circuit was designed using 0.13 μm CMOS technology. It consumes 105 μA from 1.2 V supply with an input referred noise of 27.15 nV/√(Hz).