Fluorine induced formation of intermetal dielectric defects

Defects were first observed on engineering test wafers during Contact Photolithography ADI (After Develop Inspection). The defects had the appearance of large white spots, which were several microns in diameter. SEM and TEM studies revealed that the defects were delaminations at the interface between the thermal oxide and the TEOS at the contact module of the wafer process. The results from defect partitioning showed the defects first appeared after high temperature BPSG anneal. It was also observed that only the first one or two wafers in a lot had defects. Chemical contamination analysis using SIMS identified high fluorine concentrations. The results showed that the fluorine concentration of the first wafer through the TEOS process was >30% higher than the rest of the wafers in the lot. Several experimental matrices were designed and conducted to quickly contain the problem, to investigate the defect mechanisms, and to eliminate the defects. It has been concluded that the fluorine outgassing from the P/sup +/ implanted area (BF/sub 2/ implant) during high temperature BPSG anneal is the major mechanism of the defect phenomena. TEOS chamber precoating has been shown to reduce the fluorine integrated concentration of the TEOS film and has eliminated the defects.