On improving real-time observability for in-system post-silicon debug

To identify design errors that escape pre-silicon verification, post-silicon debug is becoming an important step in the implementation flow of digital circuits. It is concerned with identifying design errors that escape to silicon. While commonly used in practice, it has received less research focus when compared to its complementary problem of manufacturing test, which is focused on screening for fabrication defects. We provide the background and summarize some recent research that addresses the emerging challenges.