A multi-rail shared error ADC with pipeline structure for DC-DC converter digital controller in 0.13µm CMOS technology

This paper presents the design and measurement results of an error ADC with a pipeline structure for DC-DC converter digital controller in 0.13μm technology. The proposed error ADC shared by three voltage rails through an analog MUX. The error signal is amplified by a differential amplifier and a switched capacitor amplifier with a total gain of 10. The amplified error signal is then digitized with a conventional 5b pipeline ADC. The ADC operates at a sampling frequency of 12 MSPS, draws 3mA from a single 1.5V power supply with an area of 500μm by 600μm. Metal fringe capacitors are used for switched-capacitor circuit.