VLSI design of the reassembly management for ATM/AAL

The reassembly management is one of the key components in the ATM receiving function. To achieve high memory efficiency, we adopt a shared memory approach with the linked-list structure to support the ATM/AAL reassembly management. The chip with the die size 6570/spl times/6490 /spl mu/m/sup 2/ and packaged in a 144-pin CQFP is fabricated by using TSMC 0.8 /spl mu/m SPDM N-well CMOS technology. The designed chip can simultaneously support 256 connections and manage 3 Mbytes of the receiving buffer.