Fabrication and electrical characteristics of self-aligned (SA) gate-all-around (GAA) si nanowire MOSFETs (SNWFET)

We have proposed gate-all-around Silicon nanowire MOSFET (SNWFET) on bulk Si as an ultimate transistor. Well controlled processes are used to achieve gate length (L
_G
) of sub-10nm and narrow nanowire widths. Excellent performance with reasonable V
_TH
and short channel immunity are achieved owing to thin nanowire channel, self-aligned gate, and GAA structure. Transistor performance with gate length of 10nm has been demonstrated and nanowire size (D
_NW
) dependency of various electrical characteristics has been investigated. Random telegraph noise (RTN) in SNWFET is studied as well.