Transistor characteristics for direct-coupled transistor logic circuits

The basic requirement for stability of a direct-coupled transistor logic (dctl) circuit is that a voltage margin exist between the maximum collect-emitter voltage of an ''on'' unit in the system environment and the minimum base-emitter voltage required for a transistor to be sufficiently ''off.'' This margin has been expressed in terms of the fundamental device parameters: commonbase forward and inverse current αN and αI; ohmic body resistances of the emitter, collector, and base regions, γ
_e
' and γ
_c
' γ
_bIII
; collector saturation current, I
_co
; and the ratio of the value of α in the vicinity of the ''off'' state to its value in the vicinity of the ''on'' state. In addition, the connection of bases in parallel results in a dependence of stability on the magnitude of α
_I
and of γ
_bIII
and on the variations of αN, αI, γbIII and I
_CO
among units connected in this manner. Circuit stability requirements have been expressed in terms of these parameters and the effect of their variations is considered. Methods for the specification of acceptance requirements for dctl transistors and the relation of these specifications to logic design rules are discussed.