Optimized silicon low-voltage power MOSFET's for high-frequency power conversion

The specific results obtained from a systematic optimization of low-voltage silicon power MOSFET technologies are discussed. The areas discussed include system impact, unit cell optimization, device and process modeling, fabrication technology development, and measured results. The device technologies optimized include 30 V, 50 V, and 100 V vertical power DMOSFETs with refractory silicide gate and contact metallizations. Devices with the lowest specific on-resistance, the lowest specific input capacitance, and optimized switching performance have been fabricated with excellent wafer yield. These results represent the best high-frequency switching performance based on silicon material technology ever reported.<
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