Video communications using rapidly reconfigurable hardware

Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of video applications in which temporal algorithm partitioning and rapid adaptivity are feasible and desired.