Rapid exploration of multimedia system-on-chips with automatically generated software performance models

A challenge in the design space exploration of todays' multimedia system-on-chip (SoC) designs is to rapidly evaluate the large number of different processor types. This limitation is resolved by our methodology, originated from the SIMBA1 project. It automatically generates a Sys- temC performance model of the software code with respect to the chosen processor type. The generated performance model consists of the original software C-code annotated with SystemC wait statements to consider the execution time on the target processor. These wait statements are automatically determined by the target cross-compiler's assembler code and the processor datasheet and consider also memory accesses and pipeline effects. In our experiments we automatically generate both a performance model of an ARM and a TI processor. This only requires the target cross-compiler and the processor datasheet and is widely applicable to various processor types. We show that our models can be used easily to compare the software performance on these platforms. We also demonstrate that the models can be smoothly integrated into an existing multimedia SoC for a rapid software-driven architecture exploration.