Wiring Capacitance Simulation in Two and Three Dimensions

In recent VLSIs, circuit performance is determined by wiring-related parasitic elements as well as by intrinsic active devices[l]. In case of wiring resistance, accurate prediction is possible by simple and effective methods[2]. However, for wiring capacitance, multi-layer wiring with many different kinds of insulators complicates the situation. Thus, to evaluate wiring capacitance carefully, three dimensional(3D) wiring capacitance simulation is necessary. However, there are difficulties, such as memory size, calculation time and data-input-method-problem[3], in realizing a practical 3D simulator. To overcome these difficulties, a combination approach with a 2D simulator, DEWCAP, and a 3D simulator, TRICEPS, was proposed (Fig.1) as well as new algorithms. The approach realizes a variety of functions, i.e., DEWCAP is suitable to analyze geometrical effects in detail and TRICEPS is suitable to analyze real 3D effects on wiring capacitance.