Analysis of Submicron MOS Device Characteristics Using a Composite Full Three-Dimensional Process/Device Simulation System

Submicron CMOS circuits are promising candidates for the future high performance VLSIs. The most serious limitation for submicron MOSFETs arises from impact ionization due to high electric field [1]-(3). It is inevitable to investigate the high electric field effects in small MOSFETs, which can be seriously degrade their performance due to the generation of gate and substrate currents.