Study of Low-Temperature and Post-Stress Hysteresis in High-k Gate Dielectrics

In this work, we present the comparison of hysteresis behaviors of HfAlON and HfSiON high-k dielectrics at low-temperature and subjected to constant voltage stress (CVS). The V
_FB
instability in the HfAlON and HfSiON gate dielectric were deeply studied. A model is proposed to explain the V
_FB
shift and hysteresis direction in thus two samples. We also treat the CVS voltage and CVS time dependence of hysteresis and V
_FB
shift. The decreasing hysteresis with temperature is ascribed to traps generation/recombination rate reduction at low temperature.