Hardware Implementation of Continued Logarithm Arithmetic

This paper gives details on architecture of an arithmetic unit built on principles of continued logarithms and pro- vides its sample characterization using FPGA technology. Continued logarithms can be used for exact arithmetic, but similarly to other exact/reliable methods they face the in- stant problem of poor performance. Their naturally binary character, however, gives them a good potential to be re- alized directly in hardware. We prove feasibility of this approach by constructing a continued logarithm unit and quantifying its possible performance.