$I_{D}$– $V_{\rm GS}$-Based Tools to Profile Charge Distributions on NROM Memory Devices

NROM memory cells are proposed as promising nonvolatile memories. Even though these devices should have a better endurance than their floating-gate counterparts, issues have risen due to the presence of both electrons and holes, for the control of their relative position and spread in the charge-trapping material. Thus, a deep knowledge of charge distribution features is crucial for program/erase bias optimization, reliability predictions, and future scaling. In this paper, we will introduce and discuss two tools based on I
_D
-V
_GS
curves (i.e., subthreshold slope and I
_D
temperature effects) which will be used to profile charge distribution. Simple formulas allowing to calculate charge distribution length and density will be derived, and their accuracy will be tested for cells programmed at different levels and under different bias conditions. Finally, we will discuss the limits of both tools when applied to erased NROM cells, i.e., cells having both electron and hole distributions in the nitride region above the junction.