On-Chip Circuit for Measuring Data Jitter in the Time or Frequency Domain

An on-chip data jitter measurement circuit in 0.11-μm CMOS is demonstrated. It utilizes a data-to-clock converter, pulse generators, and an integrator followed by a sample-&-hold. The circuit outputs a data jitter waveform in real-time, and doesn't require a reference clock. Its measurement linearity is 11
μ
V/ps with an error of 1.56 ps
_RMS
for a 2.5 Gbps 7-stage PRBS.