The Progress in Ultra Thin Gate Dielecgtric for System LSI Application

EOT reduction is a key challenge to keep the Moore's law, especially in low power LSIs. Nice candidates of gate dielectric as alternative to conventional SiO
₂
are N-rich SiON and high-K. However, in each case, we truly need tuning tools of Vth in the system LSI applications. F incorporation technique should be effective in Vth tuning with both N-rich SiON and high-K. Moreover, F incorporation is promising from reliability aspect