RF Design Challenges at 90nm RFCMOS Technology Under Low Voltage Applications

This paper presents an overview of the RF design challenges in 90nm RFCMOS technology for low voltage applications. It will first cover the state of the art 90nm RFCMOS technology offerings of advanced active and passive devices. The design challenges of key RF circuit blocks such as LNA, mixer and VCO will be discussed in details, with the emphasis on the performance impact to gain, noise and linearity under low supply voltage. The accurate device modeling for FET devices to account for substrate, oxide stress and parasitic effects are also addressed