PRBS generation and error detection above 10 Gb/s using a monolithic Si bipolar IC

This paper describes the application of a monolithic Si bipolar IC to serve as a single-chip measurement instrument for pseudo-random binary sequence (PRBS) generation, bit error detection, de-scrambling, and trigger derivation up to 12.5 Gb/s. The package interconnect problem of high I/O count multi-Gb/s IC's is addressed. The paper presents a packaging solution with improved ground contact and odd-mode controlled impedance differential microstrip transmission lines. A method for phase synchronization of multiple PRBS generators is proposed and its feasibility is demonstrated by measurement results.<
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