Targeting the Motorola RISC compiler for the PowerPC architecture

Compiler technology has proven to be an integral part of overall performance in RISC systems. Motorola is providing highly optimizing C and FORTRAN compilers as part of the overall solution for the PowerPC and 88000 RISC architectures. This paper gives an introduction to the Motorola RISC compiler technology and describes how the technology was extended to support the PowerPC architecture in addition to the 88000.<
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