VLSI CMOS implementation of the shuffleout ATM switch interconnection matrix

The VLSI design and implementation of the shuffleout broadband switch interconnection matrix are described in order to show its feasibility with current CMOS technology. It satisfies simultaneously the requirements for ATM switching and for ASIC industrial manufacturing. The shuffleout routing principles are briefly summarized and the design approach is discussed. The switching element major blocks are described and the performance, complexity, and testability of the resulting chip are illustrated with considerations on the different layout approaches and methodologies. Some conclusions based on the results obtained are summarized.<
>