High level behavioural modelling and simulation of mixed analogue-digital ASICs

This paper describes ongoing work within LSI Logic on high level analogue behavioural modelling for application to the design of its mixed analogue-digital ASICs. It is implemented in the proprietary Behavioral Specification Language (BSL), which has similar capabilities to the behavioural view of VHDL. The models thus developed are simulated using LSI Logic's behavioural simulator BSIM.<
>