An asymmetric memory cell using a C-TFT for ULSI SRAMs

A compact SRAM memory cell structure using a set of C-TFTs (complementary thin-film transistors) is discussed. A C-TFT is composed of a top-gate N-channel TFT and a bottom-gate P-channel TFT. The proposed cell's size was reduced to 80% of that of a conventional one at the 16-Mb SRAM level. Also, a stable read operation under a low-supply voltage could be realized by using a C-TFT.<
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