Three transistor exponential transconductor

This work presents a novel exponential transconductor which is formed with only three NMOS transistors working in weak inversion. The circuit is biased with a single current source favoring the design of low voltage circuits and it can have a bias voltage from 1.2V and lower. An important circuit characteristic resides on his high performance output range feature, which is maintained up to 10/spl mu/A to an input voltage range near of 800mV. Also, the output current preserves a wide region of work up to five decades of current range. Post-layout simulations realized in HSPICE are presented. Process parameters of a 0.5/spl mu/m AMIs CMOS technology and BSIM3v3 model was employed in the design of the exponential transconductor. The circuit was verified experimentally using CD4007 CMOS transistors arrays, and it agrees faithfully with the presented theoretical study.