An image comparison circuit design

Solder paste deposit on printed circuit boards is a critical stage. It is known that about 60% of defects in function, in this type of boards, are due to poor solder paste printing. These defects can be avoided by means of optical inspection of this printing. However, such an inspection is a tedious and intensive labor for human inspectors. In this work we propose to implement an image comparison algorithm in FPGA, which will be incorporated to an automatic inspection system. The hardware implementation of the algorithm allows us to fulfil time requirements demanded by modern industry. The algorithm can detect defects in solder paste placement, this can be done by comparing a non-defective board image and test images.