Effect of metal contaminants in pre-gate oxide cleans for sub-100-nm devices

Metal contaminants at trace levels in the pre-gate oxide clean solutions have always been a concern with scaling down trends in CMOS-based devices. The effect of multielement contamination (alkali, transition, and noble metals up to 200 ppb levels) in dilute hydrofluoric acid (DHF), standard clean one (SC1), and standard clean two (SC2) solutions is investigated for an Intel Pentium-based sub-100-nm microprocessor technology. The main significance of this work is to achieve a rational specification for process chemical purity. Results from surface analyses of monitor wafers and device level electrical measurements of production scale wafers along with yield and reliability analyses are presented in this paper. Deposition of metallic contaminants from clean solutions has been explained qualitatively based on electrochemical theory of reduction potentials. Among the 35 elements investigated in this study, only platinum at very low parts-per-billion levels in the HF-based cleans has been found to affect the gate oxide integrity producing zero yield. An increase in the surface roughness (2-8/spl times/) was also observed with silicon monitor wafers for 100-ppb-platinum-contaminated DHF solutions and could play an important role in degrading the gate oxide performance. Other alkali and transition metals including copper up to 200 ppb levels in the HF-based cleans studied here did not show any deleterious effects in the gate oxide integrity and product reliability measurements. The effect of contamination in the SC1 and SC2 cleans was negligible even for 100 ppb platinum. Significant cost reduction can be realized by safely relaxing the process chemical contamination disposition limits for alkali and transition elements.