A 64 channel programmable receiver chip for 3G wireless infrastructure

We present a CDMA wireless infrastructure chip that handles digital baseband receive functions for up to 64 voice channels, representing over 150 GOPS of computation, and dissipating 32mW/channel. Vector datapaths and two embedded ARM cores are employed for flexibility and high channel density. The chip is fabricated in a 130 nm 7 layer metal process and contains 75M transistors.