Properties of selectively doped heterostructure transistors incorporating a superlattice donor layer

We report on some salient features of an improved structure of selectively doped heterostructure transistor (SDHT) incorporating a short-period (30 Å) Al
0.6
Ga
0.4
As/n-GaAs superlattice donor layer. We show that this superlattice-SDHT (S
²
DHT) structure is a good candidate for both low-temperature packaged operation and room temperature applications. In addition to eliminating drain I-V distortion at low temperature, the device shows a threshold voltage shift from 300 K to 77 K of only ∼50 mV. The device also has high transconductance (∼250 mS/mm for 1-µm gate lengths at room temperature), larger voltage swing, and higher current driving capability than conventional SDHT's.