Two-dimensional simulation of a 2-µm CMOS process using ROMANS II

To accurately simulate processes applicable to fine-line geometry devices and VLSI circuits with feature size approaching 1 µm, a new two-dimensional process simulator program called ROMANS II (Redistribution and Oxidation Modeling ANalysis by Simulation in II dimensions) has been developed. This paper reports on the application of this program to simulate the thermal redistribution of the boron field and threshold voltage adjust implants for an n-channel device in the gate region of a 2-µm CMOS n-well process. The device fabrication schedule is discussed in detail and the process steps pertinent to the redistribution of the boron implants are simulated on ROMANS II. The surface topography and corresponding equidensity contours for each simulated process step are presented. The validity of the simulated results was checked by one-dimensional spreading-resistance measurements in the isolated field and channel regions, respectively, and the overall correlation was satisfactory. Since no two-dimensional experimental technique is available to measure impurity profiles in the transition region of the birds's beak, predictions based on ROMANS II are important.