Experimental results on junction charge-coupled devices

In junction charge-coupled devices (JCCD's) unique possibilities exist for charge injection and charge detection, which make this device an interesting candidate for analog as well as digital applications. Based on potential calculations published earlier, two processes A and B have been designed for fabricating JCCD's. The essential steps for obtaining a smooth channel potential in process A are a very light phosphorus implantation over the whole device and a phosphorus implantation through the same window used to diffuse the p-type gates. In process B, one phosphorus implantation over the whole device is used and V-groove etching provides the separation between the p-type gates. Devices have been realized with different process parameters. Irregularities in the channel potential were measured using special test devices. The best devices in process A have a transfer inefficiency of 10
^-5
and a charge-handling capability of 5.10
¹¹
electrons/cm
²
. In this process, with only seven masking steps, bipolar NPN transistors, and n-channel JFET's were also realized. These excellent results have stimulated further research on analog and digital applications of JCCD's.