A new MOS integrated circuit fabrication using Si3N4film self-alignment liftoff techniques

A new MOS integrated circuits fabrication process that realizes self-aligned source and drain contact hole formation is described. This process utilizes a Si
3
N
4
film self-alignment liftoff technique for selective oxidation (SALTS). Devices are fabricated using SALTS. It is shown that device packing density and speed show a 30-percent or more improvement over the conventional method at the same minimum lithographic feature size. It is also shown that Si
3
N
4
film deposited using the sputtering method does not cause any degradation in device characteristics.