Impurity profile determination and DC modeling of the JIGFET

The junction and insulated gate FET (JIGFET) is a novel type of JFET which is formed by implantation of a deep channel between source and drain through a MOST gate. For high voltages on the gate an inversion layer is created underneath the oxide. This inversion layer is laterally connected to the substrate. In this way a new channel control mechanism for FET's is achieved in which the inversion layer is used as a substitute for a p
⁺
-n- or an n
⁺
-p-junction. This results in a very high bulk transconductance, which is of considerable importance in many applications. In this paper the n-channel JIGFET's with implanted channels of 2.4 × 10
¹²
p
⁺
ions/cm
²
at 100 keV and 3.4 × 10
¹²
p+ ions/cm
²
at 160 keV are investigated. The implantation profiles are calculated from pulsed
C-V
measurements. From these data the dc characteristics are calculated with the abrupt space charge layer edge (ASCE) approximation and compared with the experiments for both high and low drain voltages.