Reconfigurable data path processor: implementation and application for signal processing algorithms

The paper briefly describes reconfigurable architecture classifications and comparisons, as well as an FPGA implementation of a simplified version of the reconfigurable data path processor (RDPP) using Xilinx design tools. The FPGA configured as RDPP can be employed for a wide variety of signal processing applications. That is, the inherent parallel nature of the architecture lends itself to signal processing algorithms, which are discussed. Simulations of operations on the input data stream, which include multiply-and-accumulate (MAC) operations used in filters and matrix manipulation for image processing applications, are presented.