Memory efficient JPEG2000 architecture with stripe pipeline scheme

The memory issue is the most critical problem for a high performance JPEG2000 architecture. The tile memory occupies more than 50% of the area in conventional JPEG2000 architectures. To solve this problem, we propose a stripe pipeline scheme. For this scheme, a level switch discrete wavelet transform (LS-DWT) and a code-block switch embedded block coding (CS-EBC) are proposed. With small additional memory, the LS-DWT and the CS-EBC can process multiple levels and code-blocks in parallel by an interleaved scheme. As a result, the overall memory requirements of the proposed architecture can be reduced to only 8.5% compared with conventional architectures.