A high speed 512-bit modular multiplier for a RSA chip

This paper describes a modular multiplication circuit. The circuit is used in a RSA encryption/decryption chip. The proposed multiplier implements an iterative-addition algorithm using a CSA structure. Radix-4 Booth encoding was adopted in order to reduce the number of algorithm iterations by half. The design applies the R-L binary modular exponentiation method to achieve higher performance.