Design considerations of a meta-level optimizing computer system

Today's computer systems have been greatly accelerated by various architectural features that exploit a huge amount of transistors. In order to further improve the performance, we need to devise architectural technologies that effectively utilize the hardware resources, because it is becoming difficult to speedup the program execution in proportion to the increase in transistor count. In order to answer this requirement, we are investigating to utilize some chip area for both dynamically and autonomously tuning of the configuration of the multiprocessor for high performance computation (Baba et al., 2004). We consider that the configuration should be optimized statically as well as dynamically, since the dynamic change of the program's behavior may cause a large gap between the statically provided configuration and the behavior. In particular, if we target not only numerical applications but nonnumerical ones as well, the tuning contributes to the performance improvement. The dynamic and autonomous tuning may guide the system to the best configuration for the running program, and thus allow us to effectively utilize a large amount of hardware resources for a wide variety of applications. In this paper, based on this basic idea, we consider the design and implementation issues.