Nucleation characteristics of a structured surface in a dielectric coolant in the absence of spreading effects

The demand for faster computing has propelled the development of faster and denser circuit technologies resulting in the increase in heat fluxes at the chip level. Chip heat fluxes are expected to exceed 250 W/cm/sup 2/. In a continuing effort to understand the capabilities of phase-change liquid immersion cooling, a square silicon heat sink featuring an etched cavity array (7.4 mm/spl times/7.4 mm) was anodically bonded to a Borofloat/sup /spl reg// glass substrate and thin-film aluminum heaters (6.9 mm/spl times/6.9 mm) were deposited on the rear side to simulate chip-sized heat sources and corresponding structured immersion-cooled heat sinks. The glass substrate was selected to minimize thermal spreading and symmetry to eliminate back heat loss, in order to yield one-dimensional heat transfer data. The pool boiling characteristics of pyramidal shaped re-entrant cavities (characteristic size 40 /spl mu/m) etched in silicon were evaluated in this study. The effect of cavity spacing of 0.5 mm, 0.75 mm and 1.0 mm on the heat dissipation is reported. The effect of convection plumes, on nucleate boiling parameters, from a heat source located below the test heater, with two different inter-module spacings, is also documented. High-speed photography was used to record and quantify the departure frequency, the bubble departure diameter and also to observe the effect of interaction between neighboring nucleation sites. All experiments were conducted in the dielectric fluid FC 72 at saturation temperature and at atmospheric pressure.