0.4-V logic-library-friendly SRAM array using rectangular-diffusion cell and delta-boosted-array voltage scheme

We designed a logic-library-friendly SRAM array. The array uses rectangular-diffusion cell (RD cell) and delta-boosted-array-voltage scheme (DBA scheme). In the RD cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA scheme compensates it. Using the combination of RD cell and DBA scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency, 140-/spl mu/W power dissipation, and 0.9-/spl mu/A standby current.