Modeling and design for electrical performance of wideband flip-chip transition

A locally matching technique is proposed in this paper to improve the wideband performance of the flip-chip transition. The gap width of the coplanar waveguide (CPW) line in the bump pad region of both the chip and board is enlarged for achieving larger inductance to compensate the capacitance at the transition, making the approximate impedance close to 50 /spl Omega/. An equivalent circuit is derived from the frequency response of the transition simulated by Sonnet and is used to control the zero frequency of the structure. With a properly chosen value of the enlarged width, the zero frequency can be controlled to achieve an optimal transition performance over an as wide as possible bandwidth. A systematic design procedure is established and employed to design a transition over a band from dc to 60 GHz. The design and simulation results are also compared with the measured data of a scaled structure as well as a realization of an optimized flip-chip transition design ranging from dc to Ka band. The measured data show a good agreement with the simulation results, if under a careful calibration procedure. Both demonstrate that the present transition design can achieve better than 25 dB in return loss and 0.2 dB in insertion loss over dc to 35 GHz.