Analysis of jitter in phase-locked loops

Jitter in clock signals is analyzed, linking noise in free-running oscillators to short-term and long-term time-domain behavior of phase-locked loops. Particular attention is given to comparing the impact of 1/f noise and white noise in oscillators and frequency dividers on jitter in phase-locked loops of first- and second-order. Theoretical analysis is supported by results obtained using mixed-signal behavior simulation.