A four quadrant MOS analog multiplier

An MOS analog multiplier based on the square law algebraic identity will be covered. The multiplier achieves a nonlinearity of 9.44%, a bandwidth of 5MHz, dynamic range of 87dB and total harmonic distortion of 0.59%. The chip was fabricated with a 5μm P-well CMOS process. Size is 500mil
²
and total power consumption is 10mW.