A subnanosecond HEMT 1Kb SRAM

HIGH SPEED LSIs have been required for high performance mainframe computers. The development of High Electron Mobility Transistor (HEMT) is felt to be applicable for high-speed logic operation. This paper will report on the design of a 1K x 1b fully static RAM using HEMT. The RAM was constructed with Enhancement/Depletion (E/D) type DCFL circuitry, using 1.5μm gate devices, and 3μm line process.