Circuit Models to Predict Switching Performance of Nanosecond Blocking Oscillators

This paper presents circuit models for calculating the switching time of transistor blocking oscillators operating in the nanosecond time domain. The accuracy of the original theory proposed by Linvill and Mattson is tested using transistors with increasing alpha cutoff frequency. It is found that this theory gives close correlation between measured and calculated switching time for low-frequency transistors; however, for high-frequency units, differences as large as an order of magnitude exist. A new model is presented which adequately describes the oscillator performance with high-frequency transistors. Although large signals are involved in the circuit's operation, a large-signal transistor model is necessary only during a description of initial turnon. Switching time minimization is studied using the new models by examining the sensitivity of the oscillator switching time to variation in circuit model parameters. Graphs which show theoretical and measured sensitivity to parameter variation are presented. Three blocking oscillators have been constructed and tested to experimentally verify the accuracy of the new models. Measured results demonstrate that the equations derived from the new circuit models are quite adequate for calculating switching times of blocking oscillators in the nanosecond region.