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A 1.7–3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4–4.8 dB NF | IEEE Journals & Magazine | IEEE Xplore

A 1.7–3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4–4.8 dB NF


Abstract:

This article reports a channel-selection N-path passive low-noise amplifier (pLNA) featuring only switches, capacitors, and a step-up transformer (i.e. a SCT network) to ...Show More

Abstract:

This article reports a channel-selection N-path passive low-noise amplifier (pLNA) featuring only switches, capacitors, and a step-up transformer (i.e. a SCT network) to build a highly linear, frequency-tunable, and high-Q bandpass response with in-band voltage gain and input-impedance matching. We also reveal the inductive and lowpass properties of the step-up transformer, composed of two vertically coupled spiral coils, for passband centering with the local oscillator (LO) frequency, and harmonic-folding reduction. Prototyped in 28 nm CMOS, a 4-path 20 MHz-bandwidth pLNA scores a 9.8 dB voltage gain and a 3.4–4.8 dB NF over a 1.7–3.6 GHz range. At 3 GHz, the out-of-band (OB)-IIP3 measures +23.5 dBm, and the 3rd-harmonic-folding rejection ratio (HFRR3) is 33 dB. With a blocker applied at the 80 MHz offset, the blocker −1 dB compression point ( \text{B}_{-1\,\text {dB}} ) attains +1.7 dBm, and the blocker NF only raises moderately to 4.7 dB up to a 0 dBm blocker power. The only dynamic power comes from the four-phase 25%-duty-cycle LO generator that consumes 17.8–38.2 mW between 1.7 and 3.6 GHz. The entire pLNA occupies a 0.84 mm2 die area.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 57, Issue: 2, February 2022)
Page(s): 413 - 422
Date of Publication: 14 December 2021

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