Contents INTRODUCTION
The DMOSFET has been proposed and studied for realizing both short channel and high drain breakdown voltage at the same time [1], [2]. The channel impurity distribution of the DMOSFET is designed by double-diffusion process, which is made by diffusing both P and N type impurities from the source region. Because of this double-diffused region, however, it is very difficult to determine its effective channel length by the conventional extraction methods [3], [4], and thus developing a good device model for circuit design tools, like SPICE, is difficult. This fact is demonstrated by the dependency of the observed channel length on gate voltage , as mentioned later in Figs. 3 and 4. Early study modeled the DMOSFET by two MOSFET connected in series [5], [6]. In this study, the channel length was estimated to be the design channel length minus the lateral diffusion length of the impurity in the source and drain regions. The accuracy of such an estimation was enough for channel DMOSFET. It, however, is not enough for the present DMOSFET having less than channel.
