Low-Temperature Accelerated Gate Reliability of Schottky-type p-GaN Gate HEMTs

The time-dependent gate failure behavior of Schottky-type p-GaN gate transistors subjected to positive gate voltage stress in the low-temperature range of power electronic applications (i.e. −100 °C ~ 25 °C) is investigated. By means of temperature-accelerated and voltage-accelerated gate stress experiments, the dependence of time-to-failure on temperature and voltage are unveiled. The p-GaN gate exhibits a shorter time-to-failure at low temperatures. It is found that the time-to-failure at “use condition” predicted by acceleration tests at high gate bias stress could be overestimated under low temperatures. The root cause for such a discrepancy is that the gate leakage is dominated by different mechanisms at high/low gate bias stress conditions. At low temperatures, the accelerated gate bias stress is suggested to deploy lower voltage than that used at room temperature or above, in order to obtain more accurate predictions of the gate lifetime.